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A **current mirror** is a circuit designed to copy a current through one active device by controlling the current in another active device of a circuit, keeping the output current constant regardless of loading. The current being "copied" can be, and sometimes is, a varying signal current. Conceptually, an ideal current mirror is simply an ideal *inverting current amplifier* that reverses the current direction as well, or it could consist of a current-controlled current source (CCCS). The current mirror is used to provide bias currents and active loads to circuits. It can also be used to model a more realistic current source (since ideal current sources do not exist).

The circuit topology covered here is one that appears in many monolithic ICs. It is a Widlar mirror without an emitter degeneration resistor in the follower (output) transistor. This topology can only be done in an IC, as the matching has to be extremely close and cannot be achieved with discretes.

Another topology is the Wilson current mirror. The Wilson mirror solves the Early effect voltage problem in this design.

Current mirrors are applied in both analog and mixed VLSI circuits.

There are three main specifications that characterize a current mirror. The first is the transfer ratio (in the case of a current amplifier) or the output current magnitude (in the case of a constant current source CCS). The second is its AC output resistance, which determines how much the output current varies with the voltage applied to the mirror. The third specification is the minimum voltage drop across the output part of the mirror necessary to make it work properly. This minimum voltage is dictated by the need to keep the output transistor of the mirror in active mode. The range of voltages where the mirror works is called the **compliance range** and the voltage marking the boundary between good and bad behavior is called the **compliance voltage**. There are also a number of secondary performance issues with mirrors, for example, temperature stability.

For small-signal analysis the current mirror can be approximated by its equivalent Norton impedance.

In large-signal hand analysis, a current mirror is usually and simply approximated by an ideal current source. However, an ideal current source is unrealistic in several respects:

- it has infinite AC impedance, while a practical mirror has finite impedance
- it provides the same current regardless of voltage, that is, there are no compliance range requirements
- it has no frequency limitations, while a real mirror has limitations due to the parasitic capacitances of the transistors
- the ideal source has no sensitivity to real-world effects like noise, power-supply voltage variations and component tolerances.

A bipolar transistor can be used as the simplest *current-to-current converter* but its transfer ratio would highly depend on temperature variations, β tolerances, etc. To eliminate these undesired disturbances, a current mirror is composed of two cascaded *current-to-voltage* and *voltage-to-current* converters placed at the same conditions and having reverse characteristics. It is not obligatory for them to be linear; the only requirement is their characteristics to be mirrorlike (for example, in the BJT current mirror below, they are logarithmic and exponential). Usually, two identical converters are used but the characteristic of the first one is reversed by applying a negative feedback. Thus a current mirror consists of two cascaded equal converters (the first – reversed and the second – direct).

If a voltage is applied to the BJT base-emitter junction as an input quantity and the collector current is taken as an output quantity, the transistor will act as an *exponential voltage-to-current converter*. By applying a negative feedback (simply joining the base and collector) the transistor can be "reversed" and it will begin acting as the opposite *logarithmic current-to-voltage converter*; now it will adjust the "output" base-emitter voltage so as to pass the applied "input" collector current.

The simplest bipolar current mirror (shown in Figure 1) implements this idea. It consists of two cascaded transistor stages acting accordingly as a *reversed* and *direct* voltage-to-current converters. The emitter of transistor Q_{1} is connected to ground. Its collector and base are tied together, so its collector-base voltage is zero. Consequently, the voltage drop across Q_{1} is *V*_{BE}, that is, this voltage is set by the diode law and Q_{1} is said to be diode connected. (See also Ebers-Moll model.) It is important to have Q_{1} in the circuit instead of a simple diode, because Q_{1} sets *V _{BE}* for transistor Q

The current delivered by the mirror for arbitrary collector-base reverse bias, *V*_{CB}, of the output transistor is given by:

where *I _{S}* is the reverse saturation current or scale current;

as found using Kirchhoff's current law at the collector node of Q_{1}:

The reference current supplies the collector current to Q_{1} and the base currents to both transistors – when both transistors have zero base-collector bias, the two base currents are equal, I_{B1} = I_{B2} = I_{B}.

Parameter β_{0} is the transistor β-value for *V*_{CB} = 0 V.

If V_{BC} is greater than zero in output transistor Q_{2}, the collector current in Q_{2} will be somewhat larger than for Q_{1} due to the Early effect. In other words, the mirror has a finite output (or Norton) resistance given by the *r _{o}* of the output transistor, namely:

where *V _{A}* is the Early voltage; and

To keep the output transistor active, *V _{CB}* ≥ 0 V. That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is

where *V _{T}* is the thermal voltage; and

When Q_{2} has *V _{CB}* > 0 V, the transistors no longer are matched. In particular, their β-values differ due to the Early effect, with

where V_{A} is the Early voltage and β_{0} is the transistor β for V_{CB} = 0 V. Besides the difference due to the Early effect, the transistor β-values will differ because the β_{0}-values depend on current, and the two transistors now carry different currents (see Gummel-Poon model).

Further, Q_{2} may get substantially hotter than Q_{1} due to the associated higher power dissipation. To maintain matching, the temperature of the transistors must be nearly the same. In integrated circuits and transistor arrays where both transistors are on the same die, this is easy to achieve. But if the two transistors are widely separated, the precision of the current mirror is compromised.

Additional matched transistors can be connected to the same base and will supply the same collector current. In other words, the right half of the circuit can be duplicated several times with various resistor values replacing R_{2} on each. Note, however, that each additional right-half transistor "steals" a bit of collector current from Q_{1} due to the non-zero base currents of the right-half transistors. This will result in a small reduction in the programmed current.

See also an example of a mirror with emitter degeneration to increase mirror resistance.

For the simple mirror shown in the diagram, typical values of will yield a current match of 1% or better.

The basic current mirror can also be implemented using MOSFET transistors, as shown in Figure 2. Transistor *M*_{1} is operating in the saturation or active mode, and so is *M*_{2}. In this setup, the output current *I*_{OUT} is directly related to *I*_{REF}, as discussed next.

The drain current of a MOSFET *I*_{D} is a function of both the gate-source voltage and the drain-to-gate voltage of the MOSFET given by *I*_{D} = *f* (*V*_{GS}, *V*_{DG}), a relationship derived from the functionality of the MOSFET device. In the case of transistor *M*_{1} of the mirror, *I*_{D} = *I*_{REF}. Reference current *I*_{REF} is a known current, and can be provided by a resistor as shown, or by a "threshold-referenced" or "self-biased" current source to ensure that it is constant, independent of voltage supply variations.^{[1]}

Using *V*_{DG} = 0 for transistor *M*_{1}, the drain current in *M*_{1} is *I*_{D} = *f*(*V*_{GS}, *V*_{DG}=0), so we find: *f*(*V*_{GS}, 0) = *I*_{REF}, implicitly determining the value of *V*_{GS}. Thus *I*_{REF} sets the value of *V*_{GS}. The circuit in the diagram forces the same *V*_{GS} to apply to transistor *M*_{2}. If *M*_{2} is also biased with zero *V*_{DG} and provided transistors *M*_{1} and *M*_{2} have good matching of their properties, such as channel length, width, threshold voltage, etc., the relationship *I*_{OUT} = *f*(*V*_{GS}, *V*_{DG} = 0) applies, thus setting *I*_{OUT} = *I*_{REF}; that is, the output current is the same as the reference current when *V*_{DG} = 0 for the output transistor, and both transistors are matched.

The drain-to-source voltage can be expressed as *V*_{DS} = *V*_{DG} + *V*_{GS}. With this substitution, the Shichman–Hodges model provides an approximate form for function *f*(*V*_{GS}, *V*_{DG}):^{[2]}

where is a technology-related constant associated with the transistor, *W/L* is the width to length ratio of the transistor, is the gate-source voltage, is the threshold voltage, λ is the channel length modulation constant, and is the drain-source voltage.

Because of channel-length modulation, the mirror has a finite output (or Norton) resistance given by the *r _{o}* of the output transistor, namely (see channel length modulation):

where *λ* = channel-length modulation parameter and *V _{DS}* = drain-to-source bias.

To keep the output transistor resistance high, *V _{DG}* ≥ 0 V.

For the Shichman–Hodges model, *f ^{−1}* is approximately a square-root function.

A useful feature of this mirror is the linear dependence of *f* upon device width *W*, a proportionality approximately satisfied even for models more accurate than the Shichman–Hodges model. Thus, by adjusting the ratio of widths of the two transistors, multiples of the reference current can be generated.

The Shichman–Hodges model^{[4]} is accurate only for rather dated^{[when?]} technology, although it often is used simply for convenience even today. Any quantitative design based upon new^{[when?]} technology uses computer models for the devices that account for the changed current-voltage characteristics. Among the differences that must be accounted for in an accurate design is the failure of the square law in *V*_{gs} for voltage dependence and the very poor modeling of *V*_{ds} drain voltage dependence provided by λ*V*_{ds}. Another failure of the equations that proves very significant is the inaccurate dependence upon the channel length *L*. A significant source of *L*-dependence stems from λ, as noted by Gray and Meyer, who also note that λ usually must be taken from experimental data.^{[5]}

Due to the wide variation of V_{th} even within a particular device number discrete versions are problematic. Although the variation can be somewhat compensated for by using a Source degenerate resistor its value becomes so large that the output resistance suffers (i.e. reduces). This variation relegates the MOSFET version to the IC/monolithic arena.

Figure 3 shows a mirror using negative feedback to increase output resistance. Because of the op amp, these circuits are sometimes called **gain-boosted current mirrors**. Because they have relatively low compliance voltages, they also are called **wide-swing current mirrors**. A variety of circuits based upon this idea are in use,^{[6]}^{[7]}^{[8]} particularly for MOSFET mirrors because MOSFETs have rather low intrinsic output resistance values. A MOSFET version of Figure 3 is shown in Figure 4, where MOSFETs *M*_{3} and *M*_{4} operate in ohmic mode to play the same role as emitter resistors *R _{E}* in Figure 3, and MOSFETs

The operational amplifier is fed the difference in voltages *V*_{1} − *V*_{2} at the top of the two emitter-leg resistors of value *R _{E}*. This difference is amplified by the op amp and fed to the base of output transistor

If the op-amp gain *A _{v}* is large, only a very small difference

Consequently, the currents in the two leg resistors are held nearly the same, and the output current of the mirror is very nearly the same as the collector current *I _{C1}* in

where β_{1} for transistor *Q*_{1} and β_{2} for *Q*_{2} differ due to the Early effect if the reverse bias across the collector-base of *Q*_{2} is non-zero.

An idealized treatment of output resistance is given in the footnote.^{[nb 2]} A small-signal analysis for an op amp with finite gain *A*_{v} but otherwise ideal is based upon Figure 5 (β, r_{O} and *r _{π}* refer to

Combining this result with Ohm's law for , can be eliminated, to find:^{[nb 3]}

Kirchhoff's voltage law from the test source *I*_{X} to the ground of *R*_{E} provides:

Substituting for *I*_{b} and collecting terms the output resistance *R*_{out} is found to be:

For a large gain *A _{v}* ≫

a substantial improvement over the basic mirror where *R*_{out} = *r _{O}*.

The small-signal analysis of the MOSFET circuit of Figure 4 is obtained from the bipolar analysis by setting β = *g _{m} r_{π}* in the formula for

This time, *R _{E}* is the resistance of the source-leg MOSFETs M

For Figure 3, a large op amp gain achieves the maximum *R*_{out} with only a small *R _{E}*. A low value for

With the MOSFET circuit of Figure 4, like the circuit in Figure 3, the larger the op amp gain *A _{v}*, the smaller

There are many sophisticated current mirrors that have higher output resistances than the basic mirror (more closely approach an ideal mirror with current output independent of output voltage) and produce currents less sensitive to temperature and device parameter variations and to circuit voltage fluctuations. These multi-transistor mirror circuits are used both with bipolar and MOS transistors. These circuits include:

- the Widlar current source
- the Wilson current mirror used as a current source
- Cascoded current sources

**^**Keeping the output resistance high means more than keeping the MOSFET in active mode, because the output resistance of real MOSFETs only begins to increase on entry into the active region, then rising to become close to maximum value only when*V*≥ 0 V._{DG}**^**An idealized version of the argument in the text, valid for infinite op amp gain, is as follows. If the op amp is replaced by a nullor, voltage*V*_{2}=*V*_{1}, so the currents in the leg resistors are held at the same value. That means the emitter currents of the transistors are the same. If the*V*_{CB}of Q_{2}increases, so does the output transistor β because of the Early effect: β = β_{0}(1 +*V*_{CB}/*V*_{A}). Consequently the base current to Q_{2}given by*I*_{B}=*I*_{E}/ (β + 1) decreases and the output current*I*_{out}=*I*_{E}/ (1 + 1 / β) increases slightly because β increases slightly. Doing the math,_{O}= (*V*_{A}+*V*_{CB}) /*I*_{out}. That is, the ideal mirror resistance for the circuit using an ideal op amp nullor is*R*_{out}= (β + 1c)r_{O}, in agreement with the value given later in the text when the gain → ∞.**^**As*A*_{v}→ ∞,*V*_{e}→ 0 and*I*_{b}→*I*_{X}.

**^**Paul R. Gray; Paul J. Hurst; Stephen H. Lewis; Robert G. Meyer (2001).*Analysis and Design of Analog Integrated Circuits*(Fourth ed.). New York: Wiley. p. 308–309. ISBN 0-471-32168-0.**^**Gray; et al. (27 March 2001).*Eq. 1.165, p. 44*. Wiley. ISBN 0-471-32168-0.**^**R. Jacob Baker (2010).*CMOS Circuit Design, Layout and Simulation*(Third ed.). New York: Wiley-IEEE. pp. 297, §9.2.1 and Figure 20.28, p. 636. ISBN 978-0-470-88132-3.**^**NanoDotTek Report NDT14-08-2007, 12 August 2007 Archived 17 June 2012 at the Wayback Machine**^**Gray; et al. (27 March 2001).*p. 44*. Wiley. ISBN 0-471-32168-0.**^**R. Jacob Baker (7 September 2010).*§ 20.2.4 pp. 645–646*. Wiley. ISBN 978-0-470-88132-3.**^**Ivanov VI, Filanovsky IM (2004).*Operational amplifier speed and accuracy improvement: analog circuit design with structural methodology*(The Kluwer international series in engineering and computer science, v. 763 ed.). Boston, Mass.: Kluwer Academic. p. §6.1, p. 105–108. ISBN 1-4020-7772-6.**^**W. M. C. Sansen (2006).*Analog design essentials*. New York; Berlin: Springer. p. §0310, p. 93. ISBN 0-387-25746-2.

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- 4QD tec – Current sources and mirrors Compendium of circuits and descriptions