In electric circuits analysis, nodal analysis, node-voltage analysis, or the branch current method is a method of determining the voltage (potential difference) between "nodes" (points where elements or branches connect) in an electrical circuit in terms of the branch currents.
Nodal analysis is essentially a systematic application of Kirchhoff's current law (KCL) for circuit analysis. Similarly, mesh analysis is a systematic application of Kirchhoff's voltage law (KVL). Nodal analysis writes an equation at each electrical node specifying that the branch currents incident at a node must sum to zero (this is just KCL). The branch currents are written in terms of the circuit node voltages. As a consequence, each branch constitutive relation must give current as a function of voltage; an admittance representation. For instance, for a resistor, Ibranch = Vbranch * G, where G (=1/R) is the admittance (conductance) of the resistor.
Nodal analysis is possible when all the circuit elements' branch constitutive relations have an admittance representation. Nodal analysis produces a compact set of equations for the network, which can be solved by hand if small, or can be quickly solved using linear algebra by computer. Because of the compact system of equations, many circuit simulation programs (e.g., SPICE) use nodal analysis as a basis. When elements do not have admittance representations, a more general extension of nodal analysis, modified nodal analysis, can be used.
The only unknown voltage in this circuit is . There are three connections to this node and consequently three currents to consider. The direction of the currents in calculations is chosen to be away from the node.
With Kirchhoff's current law, we get:
This equation can be solved with respect to V1:
Finally, the unknown voltage can be solved by substituting numerical values for the symbols. Any unknown currents are easy to calculate after all the voltages in the circuit are known.
In this circuit, we initially have two unknown voltages, V1 and V2. The voltage at V3 is already known to be VB because the other terminal of the voltage source is at ground potential.
The current going through voltage source VA cannot be directly calculated. Therefore, we cannot write the current equations for either V1 or V2. However, we know that the same current leaving node V2 must enter node V1. Even though the nodes cannot be individually solved, we know that the combined current of these two nodes is zero. This combining of the two nodes is called the supernode technique, and it requires one additional equation: V1 = V2 + VA.
The complete set of equations for this circuit is:
In general, for a circuit with nodes, the node-voltage equations obtained by nodal analysis can be written in a matrix form as derived in the following. For any node , KCL states where is the negative of the sum of the conductances between nodes and , and is the voltage of node . This implies where is the sum of conductances connected to node . We note that the first term contributes linearly to the node via , while the second term contributes linearly to each node connected to the node via with a minus sign. If an independent current source/input is also attached to node , the above expression is generalized to . It is readily shown that one can combine the above node-voltage equations for all nodes, and write them down in the following matrix form
The matrix on the left hand side of the equation is singular since it satisfies where is an column matrix containing only 1s. This corresponds to the fact of current conservation, namely, , and the freedom to choose a reference node (ground). In practice, the voltage at the reference node is taken to be 0. Consider it is the last node, . In this case, it is straightforward to verify that the resulting equations for the other nodes remain the same, and therefore one can simply discard the last column as well as the last line of the matrix equation. This procedure results in a dimensional non-singular matrix equation with the definitions of all the elements stay unchanged.